Design a transmitter and receiver to major component level (see note below) to operate to the following specification:
+999Hz (Note that, for R=20kb/s, the test offsets shall be reduced to +99Hz and -99Hz) (Compliance matrix entry required)
Carry out a design of the major components to meet the specification (i.e. mixers, filters, amplifier blocks). The choice of each component block should be justified against the specification. Components should be chosen from up-to-date component supplier information.
The DSP sections of the design should be designed as a Matlab simulation using a complex baseband representation (i.e. 0Hz carrier frequency).
The individual report should be no more than 30 pages long, including both transceiver design and OFDM & fOFDM parts, and contain a design discussion, the design, and simulation results.
Note: you do not need to design secondary items (e.g. power supplies, displays, decoupling components, phase locked loop details)
Please check that you have correct answers for the following checklist questions:
One or two superhet stages
Please structure your report with the following chapter headings:
– to the assignment)
5.1.2. +Hz offset
5.1.3. -Hz offset
This should be a table of the specification points above, a column including the spec requirement, plus a column noting your response to each point (e.g. reference to a section number where it is discussed). Also state whether the design is compliant with the specification point, e.g. image rejection 55dB see section 3.1.5). Do not underestimate the time to do this – it should be done as a team at the same time as you perform the design.
|Spec. Para.||Exceeds/Fully/ Partial /Not done||Requirement Value||Achieved Value||See report section|
Possible vendors are: TDK, Vectron, Murata, NJR, TOKO, Tai-SAW, Sawtek, Golledge. If the filters specs do not allow the design to meet the specification, you may need to think of a double superhet design or a high sampling frequency for the DSP and do the adjacent channel filtering in the DSP.
3 Nov *Identify the S/N (Eb/No) for the BER with your modulation scheme and go on to complete Noise Figure calculations, calculating a maximum allowable system noise figure. Have at least a candidate filter for the (final) IF filter.
10 Nov *Finish your search for suitable filters and propose a superhet design
17 Nov *Identify and propose the complete structure of the transmitter and receiver
*Identify individual amplifiers and mixers
24 Nov *Identify the DSP requirements (in terms of MACS – multiplier/accumulations per second) for the transmit/receive functions (note that transmitter and receiver are not operating at the same time, and that the dominating processing requirement will be the matched filter. Propose a suitable DSP implementation (e.g. Programmable DSP or ‘hard wired’ such as in a FPGA – field programmable gate array).
*Propose the detailed changes to the Assignment 1 Matlab code to perform the demodulation required (pay particular attention to the frequency offset)
1 Dec *Present simulations of demodulation performance including behaviour with frequency offset
The individual report should be not more than 30 pages long (shorter if you can) and contain a design discussion, the design, and simulation results.
|Transceiver Design||Technical validity of transceiver design||1||30/100|
|Transceiver Report||Description of superhet transceiver design||1||40/100|
|Simulation Design||Technical validity of baseband processing||2||30/100|
|Report section||Criteria for full marks||Usual Marks Distribution|
|Introduction||Name on report. Clear description of the task, description of team member tasks, including your own contribution||5/100|
|Specification||Clear statement of your team specification. Clear and correct derivation of the NF target figure and reference to any sources you used for the target Eb/No. Correct calculation of signal bandwidth and its implication for filter choice.||10/100|
|Radio design||Clear and correct description of the reasons for the choices of frequency plan. A well-labelled and clear diagram showing key details for all blocks (NF, gain, freq, insertion loss, filter rejection achieved, etc.). Clear demonstration that adjacent channel filtering and all image channel rejection requirements are met. Analysis of achieved NF is correct and within specification, with APPCAD table of NF analysis. Clear and correct analysis of overall gain for Tx and Rx chains, including maximum input signal analysis and treatment of any amplifiers in saturation under this condition. Clear and correct transmit harmonic level analysis. Correct analysis of ADC and DAC choice. Correct analysis of DSP choice. Listing of all part numbers used, their key performance aspects for why they were chosen.||30/100|
|Signal Processing||Clear description of the changes to Assignment 1 Matlab code to implement the symbol encoding and decoding. Clear description of the differential||15/100|
|demodulation routine. Clear description of the bit timing recovery routine. Clear description OFDM and filtered-OFDM.|
|Simulation results||Presentation of performance curves of BER vs Eb/No for zero, positive and negative frequency offsets, all on the same graph. Include curves for beyond-spec frequency offsets to show the degradation in performance. Clear statement of the averaging period used for bit timing recovery. Comments on any unexpected deviations from expected performance. Presentation of simulation results of OFDM and f- OFDM systems.||15/100|
|Compliance Matrix||Clear statement of compliance/non-compliance and references to report paragraphs. No instances of non- compliance being passed as compliance.||10/100|
|Personal reflection||A thoughtful reflection covering, at least, lessons learnt, team work experience.||5/100|
|Conclusion||A concise description of the work and its results||5/100|
|References||References supported principles/design/analysis/ are listed and appropriately cited||5/100|
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